1. Field of the Invention
The present invention relates to a semiconductor device and, more particularly, to a bonding pad.
2. Description of the Related Art
In a process of manufacturing a semiconductor integrated circuit, generally, non-defective chips are selected and defective chips are marked by a die sort test after manufacture process of a wafer, and then the non-defective chips are packaged into a finished product. In this manufacturing process, the needle of a probe card of a prober may be brought into contact with a bonding pad on an integrated circuit chip region of the wafer except when the die sort test is carried out. For example, a bonding pad, which is connected to word Lines of a memory integrated circuit through switching elements, is formed and, before the die sort test is performed, a voltage is applied to the bonding pad by bringing the needle of the probe card into contact with the bonding pad and a voltage stress is applied to the word lines through the switching elements, thereby screening defective memory cells.
The more frequently the needle of the probe card contacts the bonding pad on the wafer before integrated circuit chips are packaged, the worse the yield of wire bonding and, accordingly, the worse the yield of assembly.